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Interrupts/diagnostics alarms
5.2 Interrupts
Analog Input Module AI 8xU/I HS (6ES7531-7NF10-0AB0)
30 Manual, 07/2014, A5E03484886-AC
Reaction when reaching limits 1 and 2 at the same time
If the two high limits 1 and 2 are reached at the same time, the module always signals the
hardware interrupt for high limit 1 first. The configured value for high limit 2 is irrelevant. After
processing the hardware interrupt for high limit 1, the module triggers the hardware interrupt
for high limit 2.
The module has the same reaction when the low limits are reached at the same time. If the
two low limits 1 and 2 are reached at the same time, the module always signals the
hardware interrupt for low limit 1 first. After processing the hardware interrupt for low limit 1,
the module triggers the hardware interrupt for low limit 2.
Structure of the additional interrupt information
Table 5- 4 Structure of USI = W#16#0001
Data block name
Contents
Remark
Bytes
USI
(User Structure Identifier)
W#16#0001 Additional interrupt info for hardware interrupts
of the I/O module
2
The channel that triggered the hardware interrupt follows.
Channel
B#16#00 to B#16#n Number of the event-triggering channel (n =
number of module channels -1)
1
It follows the error event that triggered the hardware interrupt.
Event
B#16#03
Low limit violated 1
1
B#16#04
High limit violated 1
B#16#05
Low limit violated 2
B#16#06
Violation of high limit 2
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